Zasm supports different syntax for some opcodes: ex hl,de ex de,hl Rlc R R = xh xl yh yl or ixh, ixl, iyh, iylīit N,R R = xh xl yh yl or ixh, ixl, iyh, iyl Rlc (RR+dis),R RR = ix iy, R = b c d e h l aīit N,(RR+dis),R RR = ix iy, R = b c d e h l a ixcbxh, _ixcbxh_Ĭommands for command line options: -ixcbxh. Ld R1,R2 R1 = yh or yl and R2 = b c d e yh yl a Ld R1,R2 R1 = xh or xl and R2 = b c d e xh xl a Ld R1,R2 R1 = b c d e yh yl a and R2 = yh or yl Ld R1,R2 R1 = b c d e xh xl a and R2 = xh or xl Inc R R = xh, xl, yh, yl or syntax variant: ixh, ixl, iyh, iyl 8080 Z180 / HD64180 which trap illegal opcodes these instructions cannot be used. On CPUs like the Command Line Options: -z180 Undocumented opcodes after a combination of index register plus prefix 0xCB behave differently on different CPU brands. For many undocumented opcodes it is well known what they do, and sometimes it is something useful. Targets: #target Z80 Z80 cpu does not trap undefined opcodes but 'just does something' instead. List of all illegal Command Line Options: -z80 These are the instructions added in the Command Line Options: -z180 Ld R1,R2 R1 = (IX+N) (IY+N) and R2 = B C D E H L A Z180 instructions Ld R1,R2 R1 = B C D E H L A and R2 = (IX+N) (IY+N) Labels: SET set, the relative jumps and the 0xCB and 0圎D prefixed opcodes. These are all instructions which use the index registers and the second register Pseudo instructions: defl, set and '=' Targets: #target Z80 Z80 opcodes, which were not already present in the Intel 8080. Note: for the 8080 assembler mnemonics see chapter '8080 assembler instructions'. Also it has no 0xCB and 0圎D prefixed commands. Labels: SET set and has no jump relative instructions. The 8080 lacks the index registers, the second register Pseudo instructions: defl, set and '=' Targets: #target Z80 Z80 and the Intel 8080. These are the instructions which are common to the Command Line Options: -z80 8080 assembler instructions for Z80 opcodes 8080 instructions
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